Faculty of
Engineering

After continuing to study the design principles of sequential and synthetic logical systems that were previously studied in the logical circuits course and studying the design tools and means related to that. The student studies the realization of logical systems using solid entity markup languages such as VHDL, Verilog, or System-C for use in the description of sequential and modular logical circuits and pre-programmed logic circuits such as ROMs, PLDs, PLAs, PALs, and FPGAs. The student concludes studying the course with a project that establishes design features according to FPGA and ASIC technologies.